Terms & Conditions

1. Engagement Models

SynthSemi provides ASIC design and verification services through various engagement models, including dedicated engineering retainers and full turnkey tapeout solutions. Each engagement is subject to a specific Statement of Work (SOW).

2. Engineering Services

While we strive for first-time-right silicon, semiconductor engineering is an iterative process. Specific deliverables and acceptance criteria will be defined in the individual service agreements.

3. Tooling and IP

Unless otherwise specified, any EDA tool licenses or third-party IPs required for the project are the responsibility of the client, though SynthSemi can provide guidance on selection and integration.

4. Limitation of Liability

SynthSemi's liability is limited to the fees paid for the specific service phase in question. We are not liable for consequential damages such as lost production time or manufacturing costs at the foundry.

5. Governing Law

These terms are governed by the laws of the jurisdiction specified in our Master Service Agreement (MSA).

Last updated: June 16, 2026